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�mpp19mpp20�ua1sdhci-pins<�mpp48mpp49mpp50mpp52mpp53mpp54mpp55mpp57mpp58mpp59�sd0sata-pins-0�mpp20�sata0sata-pins-1�mpp19�sata1sata-pins-2�mpp47�sata2sata-pins-3�mpp44�sata3i2s-pins$�mpp48mpp49mpp50mpp51mpp52mpp53�audiospdif-pins�mpp51�audiogpio-keys-pins �mpp24mpp29�gpioSgpio-leds-pins �mpp54mpp55�gpioSusb3_1-vbus-pins�mpp50�gpioSgpio@18100+!marvell,armada-370-gpiomarvell,orion-gpio��@�� �gpiopwm� �� ��>-0"5678�Sgpio@18140+!marvell,armada-370-gpiomarvell,orion-gpio��@@�� �gpiopwm��� ��>-0":;<=�Ssystem-controller@18200M!marvell,armada-380-system-controllermarvell,armada-370-xp-system-controller��clock-gating-control@18220 !marvell,armada-380-gating-clock�� ��Sphy@18300!marvell,armada-380-comphy �comphyconf���`phy@0��phy@1��phy@2��phy@3��phy@4��phy@5��mvebu-sar@18600!marvell,armada-380-core-clock���Smbus-controller@20000!marvell,mbus-controller�� PSinterrupt-controller@20a00 !marvell,mpic� �pX->  "Stimer@203001!marvell,armada-380-timermarvell,armada-xp-timer�0@0PH    � nbclkfixedwatchdog@20300!marvell,armada-380-wdt�4�` � nbclkfixed H@ cpurst@20800!marvell,armada-370-cpu-reset�mpcore-soc-ctrl@20d20#!marvell,armada-380-mpcore-soc-ctrl� lcoherency-fabric@21010$!marvell,armada-380-coherency-fabric�pmsu@22000!marvell,armada-380-pmsu� ethernet@70000!marvell,armada-370-neta�@H�%&H�okay 3rgmii-id< KXfixed-linkf�lethernet@30000!marvell,armada-370-neta�@H � �disabledethernet@34000!marvell,armada-370-neta�@@H ��okay3sgmii< KXS fixed-linkf�lusb@58000!marvell,orion-ehci�� "��okayxor@60800)!marvell,armada-380-xormarvell,orion-xor� ��okayxor00 "x�xor01 "x��xor@60900)!marvell,armada-380-xormarvell,orion-xor�  ��okayxor10 "Ax�xor11 "Bx��mdio@72004!marvell,orion-mdio� ��okayswitch@0!marvell,mv88e6085�portsport@0�slan4port@1�slan3port@2�slan2port@3�slan1port@4�swanport@5�scpu� fixed-linkf�lcrypto@90000!marvell,armada-38x-crypto� �regs" �cesa0cesa1cesaz0cesaz1� �rtc@a3800!marvell,armada-380-rtc� 8 ��  �rtcrtc-soc " �disabledsata@a8000!marvell,armada-380-ahci� �  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#address-cells#size-cellsmodelcompatiblegpio0gpio1serial0serial1interrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesregclocksstatuscache-unifiedcache-levelarm,double-linefill-incrarm,double-linefill-wraparm,double-linefillprefetch-datainterrupts#interrupt-cellsinterrupt-controllerphandlepinctrl-namespinctrl-0labelreg-shiftreg-io-widthmarvell,pinsmarvell,functionreg-namesngpiosgpio-controllergpio-ranges#gpio-cells#pwm-cells#clock-cells#phy-cellsmsi-controllerclock-namestx-csum-limitphy-modebuffer-managerbm,pool-longbm,pool-shortspeedfull-duplexdmacap,memcpydmacap,xordmacap,memsetethernetmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memclock-output-namesnand-rbnand-ecc-strengthnand-ecc-step-sizemarvell,nand-keep-confignand-on-flash-bbtread-onlymrvl,clk-delay-cycles#sound-dai-cellsusb-phyno-memory-wccell-indexdevice_typemsi-parentbus-rangeassigned-addressesinterrupt-namesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneclock-frequencyenable-methodstdout-pathvcc-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highgpiolinux,codedefault-statelinux,default-trigger