8x((wradxa,rockpisrockchip,rk3308 +7Radxa ROCK Pi Saliases=/i2c@ff040000B/i2c@ff050000G/i2c@ff060000L/i2c@ff070000Q/serial@ff0a0000Y/serial@ff0b0000a/serial@ff0c0000i/serial@ff0d0000q/serial@ff0e0000y/spi@ff120000~/spi@ff130000/spi@ff140000/ethernet@ff4e0000/mmc@ff490000/mmc@ff480000cpus+cpu@0cpuarm,cortex-a35psciZ*cpu@1cpuarm,cortex-a35psci*cpu@2cpuarm,cortex-a35psci* cpu@3cpuarm,cortex-a35psci* idle-states2pscicpu-sleeparm,idle-state?Pgxx*l2-cachecache*opp-table-0operating-points-v2*opp-408000000Q ~~r`@opp-600000000#F ~~r`@opp-8160000000, r`@opp-1008000000< **r`@arm-pmuarm,cortex-a35-pmu0STUV external-mac-clock fixed-clock mac_clkinpsci arm,psci-1.0smctimerarm,armv8-timer0   xin24m fixed-clockn6xin24m*Ygrf@ff000000&rockchip,rk3308-grfsysconsimple-mfd*Treboot-modesyscon-reboot-mode$+RB;RBGRBSRBaRB syscon@ff008000.rockchip,rk3308-usb2phy-grfsysconsimple-mfd@+usb2phy@100rockchip,rk3308-usb2phyo Hphyclk usb480m_phyokay* otg-port$CDEotg-bvalidotg-idlinestateokay *=host-port J linestateokay *>syscon@ff00b000-rockchip,rk3308-detect-grfsysconsimple-mfd+syscon@ff00c000+rockchip,rk3308-core-grfsysconsimple-mfd+i2c@ff040000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk  default + disabledi2c@ff050000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk  default+okayi2c@ff060000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk  default+ disabledi2c@ff070000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk default+ disabledwatchdog@ff080000 rockchip,rk3308-wdtsnps,dw-wdt  okayserial@ff0a0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclkdefault okayserial@ff0b0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclkdefault  disabledserial@ff0c0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclkdefault disabledserial@ff0d0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclkdefault disabledserial@ff0e0000&rockchip,rk3308-uartsnps,dw-apb-uart baudclkapb_pclkdefault okaybluetoothrealtek,rtl8723bs-bt    spi@ff120000(rockchip,rk3308-spirockchip,rk3066-spi +spiclkapb_pclk %txrxdefault ! disabledspi@ff130000(rockchip,rk3308-spirockchip,rk3066-spi +spiclkapb_pclk %txrxdefault"#$% disabledspi@ff140000(rockchip,rk3308-spirockchip,rk3066-spi +spiclkapb_pclk &&%txrxdefault'()* disabledpwm@ff160000(rockchip,rk3308-pwmrockchip,rk3328-pwmy pwmpclkdefault+/ disabledpwm@ff160010(rockchip,rk3308-pwmrockchip,rk3328-pwmy pwmpclkdefault,/ disabledpwm@ff160020(rockchip,rk3308-pwmrockchip,rk3328-pwm y pwmpclkdefault-/ disabledpwm@ff160030(rockchip,rk3308-pwmrockchip,rk3328-pwm0y pwmpclkdefault./ disabledpwm@ff170000(rockchip,rk3308-pwmrockchip,rk3328-pwmx pwmpclkdefault// disabledpwm@ff170010(rockchip,rk3308-pwmrockchip,rk3328-pwmx pwmpclkdefault0/ disabledpwm@ff170020(rockchip,rk3308-pwmrockchip,rk3328-pwm x pwmpclkdefault1/ disabledpwm@ff170030(rockchip,rk3308-pwmrockchip,rk3328-pwm0x pwmpclkdefault2/ disabledpwm@ff180000(rockchip,rk3308-pwmrockchip,rk3328-pwm pwmpclkdefault3/okay*jpwm@ff180010(rockchip,rk3308-pwmrockchip,rk3328-pwm pwmpclkdefault4/ disabledpwm@ff180020(rockchip,rk3308-pwmrockchip,rk3328-pwm  pwmpclkdefault5/ disabledpwm@ff180030(rockchip,rk3308-pwmrockchip,rk3328-pwm0 pwmpclkdefault6/ disabledrktimer@ff1a0000rockchip,rk3288-timer   pclktimersaradc@ff1e0000.rockchip,rk3308-saradcrockchip,rk3399-saradc %%saradcapb_pclk:LF Ssaradc-apbokay_7dma-controller@ff2c0000arm,pl330arm,primecell,@k apb_pclk*dma-controller@ff2d0000arm,pl330arm,primecell-@k apb_pclk*&i2s@ff350000(rockchip,rk3308-i2srockchip,rk3066-i2s5 4\i2s_clki2s_hclk && %txrxLSreset-mreset-hdefault89:; disabledi2s@ff360000(rockchip,rk3308-i2srockchip,rk3066-i2s6 5^i2s_clki2s_hclk & %rxLSreset-mreset-h disabledspdif-tx@ff3a0000,rockchip,rk3308-spdifrockchip,rk3066-spdif: 7b mclkhclk & %txdefault< disabledusb@ff4000002rockchip,rk3308-usbrockchip,rk3066-usbsnps,dwc2@ Botg peripheral@ = usb2-phyokayusb@ff440000 generic-ehciD G >usbokayusb@ff450000 generic-ohciE H >usbokaymmc@ff4800000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcH@ L 012biuciuciu-driveciu-sampleрdefault?@ABokaymmc@ff4900000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcI@ M :;<biuciuciu-driveciu-sampleрokay"default CDE0Fmmc@ff4a00000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcJ@ N 567biuciuciu-driveciu-sampleB@default GHIokay+<I_J"jnand-controller@ff4b0000(rockchip,rk3308-nfcrockchip,rv1108-nfcK@ Q-ahbnfco-xрKLMNOPQdefault disabledethernet@ff4e0000rockchip,rk3308-gmacN @macirq@@BBA@C[stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedrmiidefaultRSL} SstmmacethTokayoutputF U PPspi@ff4c0000 rockchip,sfcL@ R=clk_sfchclk_sfc VWXdefault disabledclock-controller@ff500000rockchip,rk3308-cruPYxin24mTox*interrupt-controller@ff580000 arm,gic-400@XX X@ X`    *sram@fff80000 mmio-sram+ddr-sram@0vad-sram@8000pinctrlrockchip,rk3308-pinctrlT+defaultZgpio@ff220000rockchip,gpio-bank" (%5 *Ugpio@ff230000rockchip,gpio-bank# )%5 gpio@ff240000rockchip,gpio-bank$ *%5 gpio@ff250000rockchip,gpio-bank% +%5 gpio@ff260000rockchip,gpio-bank& ,%5 *pcfg-pull-upA*dpcfg-pull-downN*apcfg-pull-none]*]pcfg-pull-none-2ma]jpcfg-pull-up-2maAjpcfg-pull-up-4maAj*cpcfg-pull-none-4ma]j*bpcfg-pull-down-4maNjpcfg-pull-none-8ma]j*[pcfg-pull-up-8maAj*\pcfg-pull-none-12ma]j *_pcfg-pull-up-12maAj *^pcfg-pull-none-smt]y*`pcfg-output-highpcfg-output-lowpcfg-input-highApcfg-inputemmcemmc-clk [*Demmc-cmd\*Eemmc-pwren ]emmc-rstn ]emmc-bus1\emmc-bus4@\\\\emmc-bus8\\\\\\\\*Cflashflash-csn0 ]*Nflash-rdy ]*Pflash-ale ]*Kflash-cle ]*Mflash-wrn]*Qflash-rdn ]*Oflash-bus8^^^^^^^^*Lsfcsfc-bus4@]]]]*Xsfc-bus2 ]]sfc-cs0]*Wsfc-clk]*Vgmacrmii-pins___]]]]] ]*Rmac-refclk-12ma _*Smac-refclk ]gmac-m1rmiim1-pins___]]]]] ]macm1-refclk-12ma _macm1-refclk ]i2c0i2c0-xfer ``* i2c1i2c1-xfer  ` `*i2c2i2c2-xfer ``*i2c3-m0i2c3m0-xfer ``*i2c3-m1i2c3m1-xfer  ` `i2c3-m2i2c3m2-xfer ``i2s_2ch_0i2s-2ch-0-mclk ]i2s-2ch-0-sclk ]*8i2s-2ch-0-lrck]*9i2s-2ch-0-sdo]*;i2s-2ch-0-sdi]*:i2s_8ch_0i2s-8ch-0-mclk]i2s-8ch-0-sclktx]i2s-8ch-0-sclkrx]i2s-8ch-0-lrcktx]i2s-8ch-0-lrckrx]i2s-8ch-0-sdo0 ]i2s-8ch-0-sdo1 ]i2s-8ch-0-sdo2 ]i2s-8ch-0-sdo3 ]i2s-8ch-0-sdi0 ]i2s-8ch-0-sdi1]i2s-8ch-0-sdi2]i2s-8ch-0-sdi3]i2s_8ch_1_m0i2s-8ch-1-m0-mclk]i2s-8ch-1-m0-sclktx]i2s-8ch-1-m0-sclkrx]i2s-8ch-1-m0-lrcktx]i2s-8ch-1-m0-lrckrx]i2s-8ch-1-m0-sdo0]i2s-8ch-1-m0-sdo1-sdi3]i2s-8ch-1-m0-sdo2-sdi2 ]i2s-8ch-1-m0-sdo3_sdi1 ]i2s-8ch-1-m0-sdi0 ]i2s_8ch_1_m1i2s-8ch-1-m1-mclk ]i2s-8ch-1-m1-sclktx ]i2s-8ch-1-m1-sclkrx]i2s-8ch-1-m1-lrcktx]i2s-8ch-1-m1-lrckrx]i2s-8ch-1-m1-sdo0]i2s-8ch-1-m1-sdo1-sdi3]i2s-8ch-1-m1-sdo2-sdi2]i2s-8ch-1-m1-sdo3_sdi1]i2s-8ch-1-m1-sdi0]pdm_m0pdm-m0-clk]pdm-m0-sdi0 ]pdm-m0-sdi1 ]pdm-m0-sdi2 ]pdm-m0-sdi3]pdm_m1pdm-m1-clk]pdm-m1-sdi0]pdm-m1-sdi1]pdm-m1-sdi2]pdm-m1-sdi3]pdm_m2pdm-m2-clkm]pdm-m2-clk]pdm-m2-sdi0 ]pdm-m2-sdi1]pdm-m2-sdi2]pdm-m2-sdi3]pwm0pwm0-pin ]pwm0-pin-pull-down a*3pwm1pwm1-pin]*4pwm1-pin-pull-downapwm2pwm2-pin]*5pwm2-pin-pull-downapwm3pwm3-pin]*6pwm3-pin-pull-downapwm4pwm4-pin]*/pwm4-pin-pull-downapwm5pwm5-pin]*0pwm5-pin-pull-downapwm6pwm6-pin]*1pwm6-pin-pull-downapwm7pwm7-pin]*2pwm7-pin-pull-downapwm8pwm8-pin ]*+pwm8-pin-pull-down apwm9pwm9-pin ]*,pwm9-pin-pull-down apwm10pwm10-pin ]*-pwm10-pin-pull-down apwm11pwm11-pin]*.pwm11-pin-pull-downartcrtc-32k]*Zsdmmcsdmmc-clkb*?sdmmc-cmdc*@sdmmc-detc*Asdmmc-pwrenbsdmmc-bus1csdmmc-bus4@cccc*Bsdiosdio-clk[*Isdio-cmd\*Hsdio-pwren[sdio-wrpt[sdio-intn[sdio-bus1\sdio-bus4@\\\\*Gspdif_inspdif-in]spdif_outspdif-out]*<spi0spi0-clkc*spi0-csn0c*spi0-misoc* spi0-mosic*!spi1spi1-clk c*"spi1-csn0 c*#spi1-miso c*$spi1-mosi c*%spi1-m1spi1m1-misocspi1m1-mosicspi1m1-clkcspi1m1-csn0 cspi2spi2-clkc*'spi2-csn0c*(spi2-misoc*)spi2-mosic**tsadctsadc-otp-pin ]tsadc-otp-out ]uart0uart0-xfer dd*uart0-cts]*uart0-rts]*uart0-rts-pin]uart1uart1-xfer dd*uart1-cts]*uart1-rts]*uart2-m0uart2m0-xfer dd*uart2-m1uart2m1-xfer dduart3uart3-xfer  d d*uart3-m1uart3m1-xfer dduart4uart4-xfer  dd*uart4-cts]*uart4-rts]*uart4-rts-pin]ledsgreen-led]*eheartbeat-led]*fusbotg-vbus-drv]*isdio-pwrseqwifi-enable-h]*gwifi-host-wakeachosenserial0:1500000n8leds gpio-ledsdefaultefgreen-ledonpower  Urockpis:green:power default-onblue-ledon heartbeat  Urockpis:blue:user heartbeatsdio-pwrseqmmc-pwrseq-simplegdefault U*Jvcc-1v8regulator-fixedvcc_1v8 4Fw@^w@vF*7vcc-ioregulator-fixedvcc_io 4F2Z^2Zvh*Fvcc-ddrregulator-fixedvcc_ddr 4F`^`vhvcc5v0-otgregulator-fixed Udefaulti vcc5v0_otg vh* vcc5v0-sysregulator-fixed vcc5v0_sys 4FLK@^LK@*hvdd-corepwm-regulatorjh vdd_coreF x^r`| 4*vdd-logregulator-fixedvdd_log 4F^vh compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0mmc1device_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-idle-statesnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsoffsetmode-bootloadermode-loadermode-normalmode-recoverymode-fastbootassigned-clocksassigned-clock-parentsclock-namesstatusinterrupt-names#phy-cellsphy-supplypinctrl-namespinctrl-0reg-shiftreg-io-widthdevice-wake-gpioshost-wake-gpiosdmasdma-names#pwm-cells#io-channel-cellsresetsreset-namesvref-supplyarm,pl330-periph-burst#dma-cellsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesbus-widthfifo-depthmax-frequencycap-sd-highspeedcap-mmc-highspeedno-sdionon-removablevmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqsd-uhs-sdr104assigned-clock-ratesphy-moderockchip,grfclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-us#reset-cells#interrupt-cellsinterrupt-controllerrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathcolordefault-statefunctionlabellinux,default-triggerreset-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highpwmspwm-supplyregulator-init-microvoltregulator-settling-time-up-us