� ����8�@( ��$rockchip,rk3399-evbrockchip,rk3399 +!7Rockchip RK3399 Evaluation Boardaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000�/i2c@ff3e0000�/serial@ff180000�/serial@ff190000�/serial@ff1a0000�/serial@ff1b0000�/serial@ff370000�/spi@ff1c0000�/spi@ff1d0000�/spi@ff1e0000�/spi@ff350000�/spi@ff1f0000�/spi@ff200000�/ethernet@fe300000�/mmc@fe330000cpus+cpu-mapcluster0core0�core1�core2�core3�cluster1core0�core1�cpu@0�cpuarm,cortex-a53��psci��(dB R�_@q~��@��� �cpu@1�cpuarm,cortex-a53��psci��(dB R�_@q~��@��� �cpu@2�cpuarm,cortex-a53��psci��(dB R�_@q~��@��� �cpu@3�cpuarm,cortex-a53��psci��(dB R�_@q~��@��� �cpu@100�cpuarm,cortex-a72��psci� (�B R�_@q~��@�� �thermal-idle�'��cpu@101�cpuarm,cortex-a72��psci� (�B R�_@q~��@�� �thermal-idle�'��l2-cache-cluster0cache��Ta@s� l2-cache-cluster1cache��Ta@s� idle-states�pscicpu-sleeparm,idle-state.x��?�� cluster-sleeparm,idle-state.���?�� display-subsystemrockchip,display-subsystemP memory-controllerrockchip,rk3399-dmcVc�rdmc_clk ~disabledpmu_a53arm,cortex-a53-pmu�pmu_a72arm,cortex-a72-pmu�psci arm,psci-1.0�smctimerarm,armv8-timer@�   �xin24m fixed-clock�n6�xin24m��{pcie@f8000000rockchip,rk3399-pcie ����axi-baseapb-base�pci+��� ��G�raclkaclk-perfhclkpm0�123syslegacyclient`+9H P,Upcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38_���������8f�������(mcoremgmtmgmt-stickypipepmpclkaclk ~disabled y ��default�interrupt-controller���pcie-ep@f8000000rockchip,rk3399-pcie-ep ����apb-basemem-base ��G�raclkaclk-perfhclkpm��8f�������(mcoremgmtmgmt-stickypipepmpclkaclk P,Upcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3� �default� ~disabledethernet@fe300000rockchip,rk3399-gmac��0� macirq8ighfj�fMrstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�f� mstmmaceth�~okay �2input?Jrgmii�default� Sc y'�P�(�mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��1@�@��р �M��rbiuciuciu-driveciu-sample��fymreset ~disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��2@�A��р �� �� �L��rbiuciuciu-driveciu-sample��fzmreset ~disabledmmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1��3� � N� ��N�rclk_xinclk_ahb�emmc_cardclock�P Uphy_arasan��~okay��(�}usb@fe380000 generic-ehci��8���P Uusb~okayusb@fe3a0000 generic-ohci��:���P Uusb~okayusb@fe3c0000 generic-ehci��<���!P"Uusb~okayusb@fe3e0000 generic-ohci��>� ��!P"Uusb~okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell��CM rapb_pclk�debug@fe432000&arm,coresight-cpu-debugarm,primecell��C M rapb_pclk�debug@fe434000&arm,coresight-cpu-debugarm,primecell��C@M rapb_pclk�debug@fe436000&arm,coresight-cpu-debugarm,primecell��C`M rapb_pclk�debug@fe610000&arm,coresight-cpu-debugarm,primecell��aL rapb_pclk�debug@fe710000&arm,coresight-cpu-debugarm,primecell��qL rapb_pclk�usb@fe800000rockchip,rk3399-dwc3+_0������Grref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkf% musb3-otg ~disabledusb@fe800000 snps,dwc3����i���rrefbus_earlysuspend6otgP#$Uusb2-phyusb3-phy >utmi_wideG_���� ~disabledusb@fe900000rockchip,rk3399-dwc3+_0������Grref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkf& musb3-otg ~disabledusb@fe900000 snps,dwc3����n���rrefbus_earlysuspend6otgP%&Uusb2-phyusb3-phy >utmi_wideG_���� ~disableddp@fec00000rockchip,rk3399-cdn-dp����  r���� �� ru�orcore-clkpclkspdifgrfP'(� fHJ�mspdifdptxapbcore�� ~disabledportsport+endpoint@0��)��endpoint@1��*��interrupt-controller@fee00000 arm,gic-v3�+_�P����� ������� �msi-controller@fee20000arm,gic-v3-its� ����ppi-partitionsinterrupt-partition-0�interrupt-partition-1�saradc@ff100000rockchip,rk3399-saradc���> Persaradcapb_pclkf� msaradc-apb ~disabledcrypto@ff8b0000rockchip,rk3399-crypto���@����rhclk_masterhclk_slavesclkf���mmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto����@�����rhclk_masterhclk_slavesclkf���mmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c�� A� ��AU ri2cpclk�;�default�++ ~disabledi2c@ff120000rockchip,rk3399-i2c�� B� ��BV ri2cpclk�#�default�,+ ~disabledi2c@ff130000rockchip,rk3399-i2c�� C� ��CW ri2cpclk�"�default�-+ ~disabledi2c@ff140000rockchip,rk3399-i2c�� D� ��DX ri2cpclk�&�default�.+ ~disabledi2c@ff150000rockchip,rk3399-i2c�� E� ��EY ri2cpclk�%�default�/+ ~disabledi2c@ff160000rockchip,rk3399-i2c�� F� ��FZ ri2cpclk�$�default�0+ ~disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart��Q`rbaudclkapb_pclk�c2<�default�1 ~disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart��Rarbaudclkapb_pclk�b2<�default�2 ~disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart��Sbrbaudclkapb_pclk�d2<�default�3~okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart��Tcrbaudclkapb_pclk�e2<�default�4 ~disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi��G[rspiclkapb_pclk�DI5 5 Ntxrx�default�6789+ ~disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi��H\rspiclkapb_pclk�5I5 5 Ntxrx�default�:;<=+ ~disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi��I]rspiclkapb_pclk�4I55Ntxrx�default�>?@A+ ~disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi��J^rspiclkapb_pclk�CI55Ntxrx�default�BCDE+ ~disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi�� K_rspiclkapb_pclk��IFF Ntxrx�default�GHIJ�+ ~disabledthermal-zonescpu-thermalXdn�|Ktripscpu_alert0�p���passive�Lcpu_alert1�$����passive�Mcpu_crit�s�� �criticalcooling-mapsmap0�L�����������������map1�MH�������������������������������������������������gpu-thermalXdn�|Ktripsgpu_alert0�$����passive�Ngpu_crit�s�� �criticalcooling-mapsmap0�N �O��������tsadc@ff260000rockchip,rk3399-tsadc��&�a O� q�Odrtsadcapb_pclkf� mtsadc-apb��s�initdefaultsleep�P�Q�P� ~disabled�Kqos@ffa58000rockchip,rk3399-qossyscon���� �Yqos@ffa5c000rockchip,rk3399-qossyscon���� �Zqos@ffa60080rockchip,rk3399-qossyscon���� qos@ffa60100rockchip,rk3399-qossyscon��� qos@ffa60180rockchip,rk3399-qossyscon���� qos@ffa70000rockchip,rk3399-qossyscon��� �]qos@ffa70080rockchip,rk3399-qossyscon���� �^qos@ffa74000rockchip,rk3399-qossyscon���@ �[qos@ffa76000rockchip,rk3399-qossyscon���` �\qos@ffa90000rockchip,rk3399-qossyscon��� �_qos@ffa98000rockchip,rk3399-qossyscon���� �Rqos@ffaa0000rockchip,rk3399-qossyscon��� �`qos@ffaa0080rockchip,rk3399-qossyscon���� �aqos@ffaa8000rockchip,rk3399-qossyscon���� �bqos@ffaa8080rockchip,rk3399-qossyscon����� �cqos@ffab0000rockchip,rk3399-qossyscon��� �Sqos@ffab0080rockchip,rk3399-qossyscon���� �Tqos@ffab8000rockchip,rk3399-qossyscon���� �Uqos@ffac0000rockchip,rk3399-qossyscon��� �Vqos@ffac0080rockchip,rk3399-qossyscon���� �Wqos@ffac8000rockchip,rk3399-qossyscon���� �dqos@ffac8080rockchip,rk3399-qossyscon����� �eqos@ffad0000rockchip,rk3399-qossyscon��� �fqos@ffad8080rockchip,rk3399-qossyscon����� qos@ffae0000rockchip,rk3399-qossyscon��� �Xpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd��1power-controller!rockchip,rk3399-power-controller�+�power-domain@34�"�� R�power-domain@33�!�� ST�power-domain@31��� U�power-domain@32�  ���� VW�power-domain@35�#� X�power-domain@25�l�power-domain@23�� Y�power-domain@22��f Z�power-domain@27��L [�power-domain@28�� \�power-domain@8�~}�power-domain@9� ��power-domain@24�� ]^�power-domain@15��+power-domain@21���r _�power-domain@19��� `a�power-domain@20��� bc�power-domain@16��+power-domain@17��� de�power-domain@18��� f�syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd��2�io-domains&rockchip,rk3399-pmu-io-voltage-domain ~disabledspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi��5ggrspiclkapb_pclk�<�default�hijk+ ~disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart��7gg"rbaudclkapb_pclk�f2<�default�l ~disabledi2c@ff3c0000rockchip,rk3399-i2c��< g � ��g g ri2cpclk�9�default�m+~okaypmic@1brockchip,rk808� n��default�o4��rk808-clkout1rk808-clkout2BpNpZpfprp~p�p�p�p�p�p�qregulatorsDCDC_REG1�vdd_log� q���pq*>regulator-state-memPh ��DCDC_REG2 �vdd_cpu_l� q���pq*>regulator-state-mem�DCDC_REG3�vcc_ddr*>regulator-state-memPDCDC_REG4�vcc_1v8�w@�w@*>regulator-state-memPhw@LDO_REG1 �vcc1v8_dvp�w@�w@*>regulator-state-mem�LDO_REG2 �vcc3v0_tp�-���-��*>regulator-state-mem�LDO_REG3 �vcc1v8_pmu�w@�w@*>�qregulator-state-memPhw@LDO_REG4�vcc_sd�w@�-��*>regulator-state-memPh-��LDO_REG5�vcca3v0_codec�-���-��*>regulator-state-mem�LDO_REG6�vcc_1v5��`��`*>regulator-state-memPh�`LDO_REG7�vcca1v8_codec�w@�w@*>regulator-state-mem�LDO_REG8�vcc_3v0�-���-��*>regulator-state-memPh-��SWITCH_REG1 �vcc3v3_s3*>regulator-state-memPSWITCH_REG2 �vcc3v3_s0*>��regulator-state-mem�regulator@40silergy,syr827�@� �vdd_cpu_b� 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mcoreaxiahb�!efuse@ff690000rockchip,rk3399-efuse��i�+} rpclk_efusecpu-id@7�cpu-leakage@17�gpu-leakage@18�center-leakage@19�cpu-leakage@1a�logic-leakage@1b�wafer-info@1c�dma-controller@ff6d0000arm,pl330arm,primecell��m@ ���� rapb_pclk�Fdma-controller@ff6e0000arm,pl330arm,primecell��n@ ���� rapb_pclk�5clock-controller@ff750000rockchip,rk3399-pmucru��u{rxin24m��  g�(J��gclock-controller@ff760000rockchip,rk3399-cru��v{rxin24m�� � ��@��B��C��x�D�#g��/�;���рxh�<4`�������#�F�����ׄׄ �� ��ׄ�syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd��w+�io-domains"rockchip,rk3399-io-voltage-domain ~disabledmipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w�ordphy-refdphy-cfggrf�  ~disabled��usb2phy@e450rockchip,rk3399-usb2phy��P{rphyclk��clk_usbphy0_480m~okay�host-port � linestate~okay?|� otg-port 0�ghjotg-bvalidotg-idlinestate ~disabled�#usb2phy@e460rockchip,rk3399-usb2phy��`|rphyclk��clk_usbphy1_480m~okay�!host-port � linestate~okay?|�"otg-port 0�lmootg-bvalidotg-idlinestate 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endpoint@0�����endpoint@1�����endpoint@2�����endpoint@3�����endpoint@4����*iommu@ff8f3f00rockchip,iommu���?�w�� raclkiface�� ~disabled��vop@ff900000rockchip,rk3399-vop-big ��� �� �v ���ׄ�����raclk_vopdclk_vophclk_vop���f maxiahbdclk~okayport+�endpoint@0�����endpoint@1�����endpoint@2�����endpoint@3�����endpoint@4����)iommu@ff903f00rockchip,iommu���?�v�� raclkiface��~okay��isp0@ff910000rockchip,rk3399-cif-isp���@�+n��rispaclkhclk��P�Udphy� ~disabledports+port@0�+iommu@ff914000rockchip,iommu ���@��P�+�� raclkiface�� 2��isp1@ff920000rockchip,rk3399-cif-isp���@�,o��rispaclkhclk��P�Udphy� ~disabledports+port@0�+iommu@ff924000rockchip,iommu ���@��P�,�� raclkiface�� 2��hdmi-soundsimple-audio-card Mi2s f �hdmi-sound ~disabledsimple-audio-card,cpu ��simple-audio-card,codec ��hdmi@ff940000rockchip,rk3399-dw-hdmi���<�(tqporiahbisfrcecgrfref��� ~disabled��ports+port@0�+endpoint@0�����endpoint@1�����port@1�dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi�����- �p�orrefpclkphy_cfggrf�f�mapb�+ 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pcfg-pull-down-18ma � �pcfg-pull-down-20ma � �pcfg-output-high �pcfg-output-low pcfg-input-enable pcfg-input-pull-up  �pcfg-input-pull-down  �clockclk-32k #�cifcif-clkin # �cif-clkouta # �edpedp-hpd #���gmacrgmii-pins� #�� � � � �����������rmii-pins� # � � � � ������i2c0i2c0-xfer #���mi2c1i2c1-xfer #���+i2c2i2c2-xfer #���,i2c3i2c3-xfer #���-i2c4i2c4-xfer # � ��si2c5i2c5-xfer # � ��.i2c6i2c6-xfer # � ��/i2c7i2c7-xfer #���0i2c8i2c8-xfer #���ti2s0i2s0-2ch-bus` #������i2s0-2ch-bus-bclk-off` #������i2s0-8ch-bus� #����������i2s0-8ch-bus-bclk-off� #�����������i2s1i2s1-2ch-busP #�������i2s1-2ch-bus-bclk-offP #�����sdio0sdio0-bus1 #�sdio0-bus4@ #����sdio0-cmd #�sdio0-clk #�sdio0-cd #�sdio0-pwr #�sdio0-bkpwr #�sdio0-wp #�sdio0-int #�sdmmcsdmmc-bus1 #�sdmmc-bus4@ #� � � �sdmmc-clk # �sdmmc-cmd # �sdmmc-cd #�sdmmc-wp #�suspendap-pwroff #�ddrio-pwroff #�spdifspdif-bus #��~spdif-bus-1 #�spi0spi0-clk #��6spi0-cs0 #��9spi0-cs1 #�spi0-tx #��7spi0-rx #��8spi1spi1-clk # ��:spi1-cs0 # ��=spi1-rx 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compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachephandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesarasan,soc-ctl-syscondisable-cqe-dcmdbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cells#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiforce-hpdgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsbrightness-levelsdefault-brightness-levelpwmsbacklightenable-gpiospower-supplyenable-active-high